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gatewayTransportSend

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This commit is contained in:
Dmitry Borisenko
2022-12-01 02:10:06 +01:00
parent 2c61580157
commit cb50965c3b
293 changed files with 67232 additions and 3 deletions
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913
lib/MySensors/hal/transport/RFM69/driver/old/RFM69_old.cpp Normal file
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// **********************************************************************************
// Driver definition for HopeRF RFM69W/RFM69HW/RFM69CW/RFM69HCW, Semtech SX1231/1231H
// **********************************************************************************
// Copyright Felix Rusu (2014), felix@lowpowerlab.com
// http://lowpowerlab.com/
// **********************************************************************************
// License
// **********************************************************************************
// This program is free software; you can redistribute it
// and/or modify it under the terms of the GNU General
// Public License as published by the Free Software
// Foundation; either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will
// be useful, but WITHOUT ANY WARRANTY; without even the
// implied warranty of MERCHANTABILITY or FITNESS FOR A
// PARTICULAR PURPOSE. See the GNU General Public
// License for more details.
//
// You should have received a copy of the GNU General
// Public License along with this program.
// If not, see <http://www.gnu.org/licenses/>.
//
// Licence can be viewed at
// http://www.gnu.org/licenses/gpl-3.0.txt
//
// Please maintain this license information along with authorship
// and copyright notices in any redistribution of this code
// **********************************************************************************
#include "RFM69_old.h"
#include "RFM69registers_old.h"
volatile uint8_t RFM69::DATA[RFM69_MAX_DATA_LEN];
volatile uint8_t RFM69::_mode; // current transceiver state
volatile uint8_t RFM69::DATALEN;
volatile uint8_t RFM69::SENDERID;
volatile uint8_t RFM69::TARGETID; // should match _address
volatile uint8_t RFM69::PAYLOADLEN;
volatile uint8_t RFM69::ACK_REQUESTED;
volatile uint8_t
RFM69::ACK_RECEIVED; // should be polled immediately after sending a packet with ACK request
volatile int16_t
RFM69::RSSI; // most accurate RSSI during reception (closest to the reception)
RFM69* RFM69::selfPointer;
bool RFM69::initialize(uint8_t freqBand, uint8_t nodeID, uint8_t networkID)
{
//powerUp();
//reset();
const uint8_t CONFIG[][2] = {
/* 0x01 */ { REG_OPMODE, RF_OPMODE_SEQUENCER_ON | RF_OPMODE_LISTEN_OFF | RF_OPMODE_STANDBY },
/* 0x02 */ { REG_DATAMODUL, RF_DATAMODUL_DATAMODE_PACKET | RF_DATAMODUL_MODULATIONTYPE_FSK | RF_DATAMODUL_MODULATIONSHAPING_00 }, // no shaping
/* 0x03 */ { REG_BITRATEMSB, RF_BITRATEMSB_55555}, // default: 4.8 KBPS
/* 0x04 */ { REG_BITRATELSB, RF_BITRATELSB_55555},
/* 0x05 */ { REG_FDEVMSB, RF_FDEVMSB_50000}, // default: 5KHz, (FDEV + BitRate / 2 <= 500KHz)
/* 0x06 */ { REG_FDEVLSB, RF_FDEVLSB_50000},
/* 0x07 */ { REG_FRFMSB, (uint8_t) (freqBand==RFM69_315MHZ ? RF_FRFMSB_315 : (freqBand==RFM69_433MHZ ? RF_FRFMSB_433 : (freqBand==RFM69_868MHZ ? RF_FRFMSB_868 : RF_FRFMSB_915))) },
/* 0x08 */ { REG_FRFMID, (uint8_t) (freqBand==RFM69_315MHZ ? RF_FRFMID_315 : (freqBand==RFM69_433MHZ ? RF_FRFMID_433 : (freqBand==RFM69_868MHZ ? RF_FRFMID_868 : RF_FRFMID_915))) },
/* 0x09 */ { REG_FRFLSB, (uint8_t) (freqBand==RFM69_315MHZ ? RF_FRFLSB_315 : (freqBand==RFM69_433MHZ ? RF_FRFLSB_433 : (freqBand==RFM69_868MHZ ? RF_FRFLSB_868 : RF_FRFLSB_915))) },
// looks like PA1 and PA2 are not implemented on RFM69W, hence the max output power is 13dBm
// +17dBm and +20dBm are possible on RFM69HW
// +13dBm formula: Pout = -18 + OutputPower (with PA0 or PA1**)
// +17dBm formula: Pout = -14 + OutputPower (with PA1 and PA2)**
// +20dBm formula: Pout = -11 + OutputPower (with PA1 and PA2)** and high power PA settings (section 3.3.7 in datasheet)
///* 0x11 */ { REG_PALEVEL, RF_PALEVEL_PA0_ON | RF_PALEVEL_PA1_OFF | RF_PALEVEL_PA2_OFF | RF_PALEVEL_OUTPUTPOWER_11111},
///* 0x13 */ { REG_OCP, RF_OCP_ON | RF_OCP_TRIM_95 }, // over current protection (default is 95mA)
// RXBW defaults are { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_24 | RF_RXBW_EXP_5} (RxBw: 10.4KHz)
/* 0x19 */ { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_16 | RF_RXBW_EXP_2 }, // (BitRate < 2 * RxBw)
//for BR-19200: /* 0x19 */ { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_24 | RF_RXBW_EXP_3 },
/* 0x25 */ { REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01 }, // DIO0 is the only IRQ we're using
/* 0x26 */ { REG_DIOMAPPING2, RF_DIOMAPPING2_CLKOUT_OFF }, // DIO5 ClkOut disable for power saving
/* 0x28 */ { REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN }, // writing to this bit ensures that the FIFO & status flags are reset
/* 0x29 */ { REG_RSSITHRESH, 220 }, // must be set to dBm = (-Sensitivity / 2), default is 0xE4 = 228 so -114dBm
///* 0x2D */ { REG_PREAMBLELSB, RF_PREAMBLESIZE_LSB_VALUE } // default 3 preamble bytes 0xAAAAAA
/* 0x2E */ { REG_SYNCCONFIG, RF_SYNC_ON | RF_SYNC_FIFOFILL_AUTO | RF_SYNC_SIZE_2 | RF_SYNC_TOL_0 },
/* 0x2F */ { REG_SYNCVALUE1, 0x2D }, // attempt to make this compatible with sync1 byte of RFM12B lib
/* 0x30 */ { REG_SYNCVALUE2, networkID }, // NETWORK ID
/* 0x37 */ { REG_PACKETCONFIG1, RF_PACKET1_FORMAT_VARIABLE | RF_PACKET1_DCFREE_OFF | RF_PACKET1_CRC_ON | RF_PACKET1_CRCAUTOCLEAR_ON | RF_PACKET1_ADRSFILTERING_OFF },
/* 0x38 */ { REG_PAYLOADLENGTH, 66 }, // in variable length mode: the max frame size, not used in TX
///* 0x39 */ { REG_NODEADRS, nodeID }, // turned off because we're not using address filtering
/* 0x3C */ { REG_FIFOTHRESH, RF_FIFOTHRESH_TXSTART_FIFONOTEMPTY | RF_FIFOTHRESH_VALUE }, // TX on FIFO not empty
/* 0x3D */ { REG_PACKETCONFIG2, RF_PACKET2_RXRESTARTDELAY_2BITS | RF_PACKET2_AUTORXRESTART_ON | RF_PACKET2_AES_OFF }, // RXRESTARTDELAY must match transmitter PA ramp-down time (bitrate dependent)
//for BR-19200: /* 0x3D */ { REG_PACKETCONFIG2, RF_PACKET2_RXRESTARTDELAY_NONE | RF_PACKET2_AUTORXRESTART_ON | RF_PACKET2_AES_OFF }, // RXRESTARTDELAY must match transmitter PA ramp-down time (bitrate dependent)
/* 0x6F */ { REG_TESTDAGC, RF_DAGC_IMPROVED_LOWBETA0 }, // run DAGC continuously in RX mode for Fading Margin Improvement, recommended default for AfcLowBetaOn=0
{255, 0}
};
hwDigitalWrite(_slaveSelectPin, HIGH);
hwPinMode(_slaveSelectPin, OUTPUT);
hwPinMode(_interruptPin, INPUT);
RFM69_SPI.begin();
unsigned long start = hwMillis();
const uint8_t timeout = 50;
do {
writeReg(REG_SYNCVALUE1, 0xAA);
doYield();
} while (readReg(REG_SYNCVALUE1) != 0xAA && hwMillis()-start < timeout);
if (hwMillis() - start >= timeout) {
// timeout: checking wiring or replace module
return false;
}
start = hwMillis();
do {
writeReg(REG_SYNCVALUE1, 0x55);
doYield();
} while (readReg(REG_SYNCVALUE1) != 0x55 && hwMillis()-start < timeout);
if (hwMillis() - start >= timeout) {
// timeout: checking wiring or replace module
return false;
}
for (uint8_t i = 0; CONFIG[i][0] != 255; i++) {
writeReg(CONFIG[i][0], CONFIG[i][1]);
}
// Encryption is persistent between resets and can trip you up during debugging.
// Disable it during initialization so we always start from a known state.
encrypt(0);
setHighPower(_isRFM69HW); // called regardless if it's a RFM69W or RFM69HW
setMode(RFM69_MODE_STANDBY);
start = hwMillis();
while (((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00) && hwMillis()-start < timeout) {
doYield();
} // wait for ModeReady
if (hwMillis()-start >= timeout) {
return false;
}
//RFM69_SPI.usingInterrupt(_interruptNum);
attachInterrupt(_interruptNum, RFM69::isr0, RISING);
selfPointer = this;
_address = nodeID;
return true;
}
// return the frequency (in Hz)
uint32_t RFM69::getFrequency()
{
return RFM69_FSTEP * (((uint32_t) readReg(REG_FRFMSB) << 16) + ((uint16_t) readReg(
REG_FRFMID) << 8) + readReg(REG_FRFLSB));
}
// set the frequency (in Hz)
void RFM69::setFrequency(uint32_t freqHz)
{
uint8_t oldMode = _mode;
if (oldMode == RFM69_MODE_TX) {
setMode(RFM69_MODE_RX);
}
freqHz /= RFM69_FSTEP; // divide down by FSTEP to get FRF
writeReg(REG_FRFMSB, freqHz >> 16);
writeReg(REG_FRFMID, freqHz >> 8);
writeReg(REG_FRFLSB, freqHz);
if (oldMode == RFM69_MODE_RX) {
setMode(RFM69_MODE_SYNTH);
}
setMode(oldMode);
}
void RFM69::setMode(uint8_t newMode)
{
if (newMode == _mode) {
return;
}
const uint8_t currentOPMODE = readReg(REG_OPMODE) & 0xE3;
switch (newMode) {
case RFM69_MODE_TX:
writeReg(REG_OPMODE, currentOPMODE | RF_OPMODE_TRANSMITTER);
if (_isRFM69HW) {
setHighPowerRegs(true);
}
break;
case RFM69_MODE_RX:
writeReg(REG_OPMODE, currentOPMODE | RF_OPMODE_RECEIVER);
if (_isRFM69HW) {
setHighPowerRegs(false);
}
break;
case RFM69_MODE_SYNTH:
writeReg(REG_OPMODE, currentOPMODE | RF_OPMODE_SYNTHESIZER);
break;
case RFM69_MODE_STANDBY:
writeReg(REG_OPMODE, currentOPMODE | RF_OPMODE_STANDBY);
break;
case RFM69_MODE_SLEEP:
writeReg(REG_OPMODE, currentOPMODE | RF_OPMODE_SLEEP);
break;
default:
return;
}
// we are using packet mode, so this check is not really needed
// but waiting for mode ready is necessary when going from sleep because the FIFO may not be immediately available from previous mode
while (_mode == RFM69_MODE_SLEEP &&
(readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00); // wait for ModeReady
_mode = newMode;
}
//put transceiver in sleep mode to save battery - to wake or resume receiving just call receiveDone()
void RFM69::sleep(void)
{
setMode(RFM69_MODE_SLEEP);
}
void RFM69::standBy(void)
{
setMode(RFM69_MODE_STANDBY);
}
void RFM69::powerDown(void)
{
#if defined(MY_RFM69_POWER_PIN)
hwDigitalWrite(MY_RFM69_POWER_PIN, LOW);
#endif
}
void RFM69::powerUp(void)
{
#if defined(MY_RFM69_POWER_PIN)
hwDigitalWrite(MY_RFM69_POWER_PIN, HIGH);
delay(RFM69_POWERUP_DELAY_MS);
#endif
}
void RFM69::reset(void)
{
// reset radio if RESET pin is defined
#ifdef MY_RFM69_RST_PIN
hwPinMode(MY_RFM69_RST_PIN, OUTPUT);
hwDigitalWrite(MY_RFM69_RST_PIN, HIGH);
// 100uS
delayMicroseconds(100);
hwDigitalWrite(MY_RFM69_RST_PIN, LOW);
// wait until chip ready
delay(5);
#endif
}
bool RFM69::sanityCheck(void)
{
bool result = true;
// check Bitrate
result &= readReg(REG_BITRATEMSB) == RF_BITRATEMSB_55555;
result &= readReg(REG_BITRATELSB) == RF_BITRATELSB_55555;
// default: 5KHz, (FDEV + BitRate / 2 <= 500KHz)
result &= readReg(REG_FDEVMSB) == RF_FDEVMSB_50000;
result &= readReg(REG_FDEVLSB) == RF_FDEVLSB_50000;
/*
// Check radio frequency band
result &= readReg(REG_FRFMSB) == (uint8_t)(MY_RFM69_FREQUENCY == RFM69_315MHZ ? RF_FRFMSB_315 : (MY_RFM69_FREQUENCY == RFM69_433MHZ ? RF_FRFMSB_433 : (MY_RFM69_FREQUENCY == RFM69_868MHZ ? RF_FRFMSB_868 : RF_FRFMSB_915)));
result &= readReg(REG_FRFMID) == (uint8_t)(MY_RFM69_FREQUENCY == RFM69_315MHZ ? RF_FRFMID_315 : (MY_RFM69_FREQUENCY == RFM69_433MHZ ? RF_FRFMID_433 : (MY_RFM69_FREQUENCY == RFM69_868MHZ ? RF_FRFMID_868 : RF_FRFMID_915)));
result &= readReg(REG_FRFLSB) == (uint8_t)(MY_RFM69_FREQUENCY == RFM69_315MHZ ? RF_FRFLSB_315 : (MY_RFM69_FREQUENCY == RFM69_433MHZ ? RF_FRFLSB_433 : (MY_RFM69_FREQUENCY == RFM69_868MHZ ? RF_FRFLSB_868 : RF_FRFLSB_915)));
*/
return result;
}
//set this node's address
void RFM69::setAddress(uint8_t addr)
{
_address = addr;
writeReg(REG_NODEADRS, _address);
}
//set this node's network id
void RFM69::setNetwork(uint8_t networkID)
{
writeReg(REG_SYNCVALUE2, networkID);
}
// set *transmit/TX* output power: 0=min, 31=max
// this results in a "weaker" transmitted signal, and directly results in a lower RSSI at the receiver
// the power configurations are explained in the SX1231H datasheet (Table 10 on p21; RegPaLevel p66): http://www.semtech.com/images/datasheet/sx1231h.pdf
// valid powerLevel parameter values are 0-31 and result in a directly proportional effect on the output/transmission power
// this function implements 2 modes as follows:
// - for RFM69W the range is from 0-31 [-18dBm to 13dBm] (PA0 only on RFIO pin)
// - for RFM69HW the range is from 0-31 [5dBm to 20dBm] (PA1 & PA2 on PA_BOOST pin & high Power PA settings - see section 3.3.7 in datasheet, p22)
void RFM69::setPowerLevel(uint8_t powerLevel)
{
_powerLevel = (powerLevel > 31 ? 31 : powerLevel);
if (_isRFM69HW) {
_powerLevel /= 2;
}
writeReg(REG_PALEVEL, (readReg(REG_PALEVEL) & 0xE0) | _powerLevel);
}
bool RFM69::canSend()
{
if (_mode == RFM69_MODE_RX && PAYLOADLEN == 0 &&
readRSSI() < CSMA_LIMIT) { // if signal stronger than -100dBm is detected assume channel activity
setMode(RFM69_MODE_STANDBY);
return true;
}
return false;
}
void RFM69::send(uint8_t toAddress, const void* buffer, uint8_t bufferSize, bool requestACK)
{
writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) |
RF_PACKET2_RXRESTART); // avoid RX deadlocks
uint32_t now = hwMillis();
while (!canSend() && hwMillis() - now < RFM69_CSMA_LIMIT_MS) {
receiveDone();
}
sendFrame(toAddress, buffer, bufferSize, requestACK, false);
}
// to increase the chance of getting a packet across, call this function instead of send
// and it handles all the ACK requesting/retrying for you :)
// The only twist is that you have to manually listen to ACK requests on the other side and send back the ACKs
// The reason for the semi-automaton is that the lib is interrupt driven and
// requires user action to read the received data and decide what to do with it
// replies usually take only 5..8ms at 50kbps@915MHz
bool RFM69::sendWithRetry(uint8_t toAddress, const void* buffer, uint8_t bufferSize,
uint8_t retries, uint8_t retryWaitTime)
{
for (uint8_t i = 0; i <= retries; i++) {
send(toAddress, buffer, bufferSize, true);
uint32_t sentTime = hwMillis();
while (hwMillis() - sentTime < retryWaitTime) {
if (ACKReceived(toAddress)) {
return true;
}
}
//Serial.print(" RETRY#"); Serial.println(i + 1);
}
return false;
}
// should be polled immediately after sending a packet with ACK request
bool RFM69::ACKReceived(uint8_t fromNodeID)
{
if (receiveDone()) {
return (SENDERID == fromNodeID || fromNodeID == RFM69_BROADCAST_ADDR) && ACK_RECEIVED;
}
return false;
}
// check whether an ACK was requested in the last received packet (non-broadcasted packet)
bool RFM69::ACKRequested()
{
return ACK_REQUESTED && (TARGETID != RFM69_BROADCAST_ADDR);
}
// should be called immediately after reception in case sender wants ACK
void RFM69::sendACK(const void* buffer, uint8_t bufferSize)
{
ACK_REQUESTED =
0; // TWS added to make sure we don't end up in a timing race and infinite loop sending Acks
uint8_t sender = SENDERID;
int16_t _RSSI = RSSI; // save payload received RSSI value
writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) |
RF_PACKET2_RXRESTART); // avoid RX deadlocks
uint32_t now = hwMillis();
while (!canSend() && hwMillis() - now < RFM69_CSMA_LIMIT_MS) {
receiveDone();
doYield();
}
SENDERID = sender; // TWS: Restore SenderID after it gets wiped out by receiveDone()
sendFrame(sender, buffer, bufferSize, false, true);
RSSI = _RSSI; // restore payload RSSI
}
void RFM69::interruptHook(uint8_t CTLbyte)
{
(void)CTLbyte;
};
// internal function
void RFM69::sendFrame(uint8_t toAddress, const void* buffer, uint8_t bufferSize, bool requestACK,
bool sendACK)
{
setMode(RFM69_MODE_STANDBY); // turn off receiver to prevent reception while filling fifo
while ((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00) {} // wait for ModeReady
writeReg(REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_00); // DIO0 is "Packet Sent"
if (bufferSize > RFM69_MAX_DATA_LEN) {
bufferSize = RFM69_MAX_DATA_LEN;
}
// control byte
uint8_t CTLbyte = 0x00;
if (sendACK) {
CTLbyte = RFM69_CTL_SENDACK;
} else if (requestACK) {
CTLbyte = RFM69_CTL_REQACK;
}
// write to FIFO
select();
RFM69_SPI.transfer(REG_FIFO | 0x80);
RFM69_SPI.transfer(bufferSize + 3);
RFM69_SPI.transfer(toAddress);
RFM69_SPI.transfer(_address);
RFM69_SPI.transfer(CTLbyte);
for (uint8_t i = 0; i < bufferSize; i++) {
RFM69_SPI.transfer(((uint8_t *)buffer)[i]);
}
unselect();
// no need to wait for transmit mode to be ready since its handled by the radio
setMode(RFM69_MODE_TX);
uint32_t txStart = hwMillis();
while (hwDigitalRead(_interruptPin) == 0 &&
hwMillis() - txStart <
RFM69_TX_LIMIT_MS) {} // wait for DIO0 to turn HIGH signalling transmission finish
//while (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PACKETSENT == 0x00); // wait for ModeReady
setMode(RFM69_MODE_STANDBY);
}
// internal function - interrupt gets called when a packet is received
void IRQ_HANDLER_ATTR RFM69::interruptHandler()
{
//hwPinMode(4, OUTPUT);
//hwDigitalWrite(4, 1);
if (_mode == RFM69_MODE_RX && (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PAYLOADREADY)) {
//RSSI = readRSSI();
setMode(RFM69_MODE_STANDBY);
select();
RFM69_SPI.transfer(REG_FIFO & 0x7F);
PAYLOADLEN = RFM69_SPI.transfer(0);
PAYLOADLEN = PAYLOADLEN > 66 ? 66 : PAYLOADLEN; // precaution
TARGETID = RFM69_SPI.transfer(0);
if(!(_promiscuousMode || TARGETID == _address ||
TARGETID ==
RFM69_BROADCAST_ADDR) // match this node's address, or broadcast address or anything in promiscuous mode
|| PAYLOADLEN <
3) { // address situation could receive packets that are malformed and don't fit this libraries extra fields
PAYLOADLEN = 0;
unselect();
receiveBegin();
//hwDigitalWrite(4, 0);
return;
}
DATALEN = PAYLOADLEN - 3;
SENDERID = RFM69_SPI.transfer(0);
uint8_t CTLbyte = RFM69_SPI.transfer(0);
ACK_RECEIVED = CTLbyte & RFM69_CTL_SENDACK; // extract ACK-received flag
ACK_REQUESTED = CTLbyte & RFM69_CTL_REQACK; // extract ACK-requested flag
interruptHook(CTLbyte); // TWS: hook to derived class interrupt function
for (uint8_t i = 0; i < DATALEN; i++) {
DATA[i] = RFM69_SPI.transfer(0);
}
if (DATALEN < RFM69_MAX_DATA_LEN) {
DATA[DATALEN] = 0; // add null at end of string
}
unselect();
setMode(RFM69_MODE_RX);
}
RSSI = readRSSI();
//hwDigitalWrite(4, 0);
}
// internal function
void IRQ_HANDLER_ATTR RFM69::isr0()
{
selfPointer->interruptHandler();
}
// internal function
void RFM69::receiveBegin()
{
DATALEN = 0;
SENDERID = 0;
TARGETID = 0;
PAYLOADLEN = 0;
ACK_REQUESTED = 0;
ACK_RECEIVED = 0;
RSSI = 0;
if (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PAYLOADREADY) {
writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) |
RF_PACKET2_RXRESTART); // avoid RX deadlocks
}
writeReg(REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01); // set DIO0 to "PAYLOADREADY" in receive mode
setMode(RFM69_MODE_RX);
}
// checks if a packet was received and/or puts transceiver in receive (ie RX or listen) mode
bool RFM69::receiveDone()
{
//ATOMIC_BLOCK(ATOMIC_FORCEON)
//{
noInterrupts(); // re-enabled in unselect() via setMode() or via receiveBegin()
if (_mode == RFM69_MODE_RX && PAYLOADLEN > 0) {
setMode(RFM69_MODE_STANDBY); // enables interrupts
return true;
} else if (_mode == RFM69_MODE_RX) { // already in RX no payload yet
interrupts(); // explicitly re-enable interrupts
return false;
}
receiveBegin();
return false;
//}
}
// To enable encryption: radio.encrypt("ABCDEFGHIJKLMNOP");
// To disable encryption: radio.encrypt(null) or radio.encrypt(0)
// KEY HAS TO BE 16 bytes !!!
void RFM69::encrypt(const char* key)
{
setMode(RFM69_MODE_STANDBY);
if (key != 0) {
select();
RFM69_SPI.transfer(REG_AESKEY1 | 0x80);
for (uint8_t i = 0; i < 16; i++) {
RFM69_SPI.transfer(key[i]);
}
unselect();
}
writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFE) | (key ? 1 : 0));
}
// get the received signal strength indicator (RSSI)
int16_t RFM69::readRSSI(bool forceTrigger)
{
int16_t rssi = 0;
if (forceTrigger) {
// RSSI trigger not needed if DAGC is in continuous mode
writeReg(REG_RSSICONFIG, RF_RSSI_START);
while ((readReg(REG_RSSICONFIG) & RF_RSSI_DONE) == 0x00) {} // wait for RSSI_Ready
}
rssi = -readReg(REG_RSSIVALUE);
rssi >>= 1;
return rssi;
}
uint8_t RFM69::readReg(uint8_t addr)
{
select();
RFM69_SPI.transfer(addr & 0x7F);
uint8_t regval = RFM69_SPI.transfer(0);
unselect();
return regval;
}
void RFM69::writeReg(uint8_t addr, uint8_t value)
{
select();
RFM69_SPI.transfer(addr | 0x80);
RFM69_SPI.transfer(value);
unselect();
}
// select the RFM69 transceiver (save SPI settings, set CS low)
void RFM69::select()
{
noInterrupts();
#if defined (SPCR) && defined (SPSR)
// save current SPI settings
_SPCR = SPCR;
_SPSR = SPSR;
#endif
// set RFM69 SPI settings
RFM69_SPI.setDataMode(SPI_MODE0);
RFM69_SPI.setBitOrder(MSBFIRST);
RFM69_SPI.setClockDivider(RFM69_CLOCK_DIV);
hwDigitalWrite(_slaveSelectPin, LOW);
}
// unselect the RFM69 transceiver (set CS high, restore SPI settings)
void RFM69::unselect()
{
hwDigitalWrite(_slaveSelectPin, HIGH);
// restore SPI settings to what they were before talking to RFM69
#if defined (SPCR) && defined (SPSR)
SPCR = _SPCR;
SPSR = _SPSR;
#endif
interrupts();
}
// true = disable filtering to capture all frames on network
// false = enable node/broadcast filtering to capture only frames sent to this/broadcast address
void RFM69::promiscuous(bool onOff)
{
_promiscuousMode = onOff;
//writeReg(REG_PACKETCONFIG1, (readReg(REG_PACKETCONFIG1) & 0xF9) | (onOff ? RF_PACKET1_ADRSFILTERING_OFF : RF_PACKET1_ADRSFILTERING_NODEBROADCAST));
}
// for RFM69HW only: you must call setHighPower(true) after initialize() or else transmission won't work
void RFM69::setHighPower(bool onOff)
{
_isRFM69HW = onOff;
writeReg(REG_OCP, _isRFM69HW ? RF_OCP_OFF : RF_OCP_ON);
if (_isRFM69HW) { // turning ON
writeReg(REG_PALEVEL, (readReg(REG_PALEVEL) & 0x1F) | RF_PALEVEL_PA1_ON |
RF_PALEVEL_PA2_ON); // enable P1 & P2 amplifier stages
} else {
writeReg(REG_PALEVEL, RF_PALEVEL_PA0_ON | RF_PALEVEL_PA1_OFF | RF_PALEVEL_PA2_OFF |
_powerLevel); // enable P0 only
}
}
// internal function
void RFM69::setHighPowerRegs(bool onOff)
{
writeReg(REG_TESTPA1, onOff ? 0x5D : 0x55);
writeReg(REG_TESTPA2, onOff ? 0x7C : 0x70);
}
// set the slave select (CS) pin
void RFM69::setCS(uint8_t newSPISlaveSelect)
{
_slaveSelectPin = newSPISlaveSelect;
hwDigitalWrite(_slaveSelectPin, HIGH);
hwPinMode(_slaveSelectPin, OUTPUT);
}
//for debugging
#define REGISTER_DETAIL 0
#if REGISTER_DETAIL
// SERIAL PRINT
// replace Serial.print("string") with SerialPrint("string")
#define SerialPrint(x) SerialPrint_P(PSTR(x))
void SerialWrite ( uint8_t c )
{
Serial.write ( c );
}
void SerialPrint_P(PGM_P str, void (*f)(uint8_t) = SerialWrite )
{
for (uint8_t c; (c = pgm_read_byte(str)); str++) {
(*f)(c);
}
}
#endif
void RFM69::readAllRegs()
{
#if REGISTER_DETAIL
int capVal;
//... State Variables for intelligent decoding
uint8_t modeFSK = 0;
int bitRate = 0;
int freqDev = 0;
long freqCenter = 0;
#endif
Serial.println("Address - HEX - BIN");
for (uint8_t regAddr = 1; regAddr <= 0x4F; regAddr++) {
select();
RFM69_SPI.transfer(regAddr & 0x7F); // send address + r/w bit
uint8_t regVal = RFM69_SPI.transfer(0);
unselect();
Serial.print(regAddr, HEX);
Serial.print(" - ");
Serial.print(regVal,HEX);
Serial.print(" - ");
Serial.println(regVal,BIN);
#if REGISTER_DETAIL
switch ( regAddr ) {
case 0x1 : {
SerialPrint ( "Controls the automatic Sequencer ( see section 4.2 )\nSequencerOff : " );
if ( 0x80 & regVal ) {
SerialPrint ( "1 -> Mode is forced by the user\n" );
} else {
SerialPrint ( "0 -> Operating mode as selected with Mode bits in RegOpMode is automatically reached with the Sequencer\n" );
}
SerialPrint( "\nEnables Listen mode, should be enabled whilst in Standby mode:\nListenOn : " );
if ( 0x40 & regVal ) {
SerialPrint ( "1 -> On\n" );
} else {
SerialPrint ( "0 -> Off ( see section 4.3)\n" );
}
SerialPrint( "\nAborts Listen mode when set together with ListenOn=0 See section 4.3.4 for details (Always reads 0.)\n" );
if ( 0x20 & regVal ) {
SerialPrint ( "ERROR - ListenAbort should NEVER return 1 this is a write only register\n" );
}
SerialPrint("\nTransceiver's operating modes:\nMode : ");
capVal = (regVal >> 2) & 0x7;
if ( capVal == 0b000 ) {
SerialPrint ( "000 -> Sleep mode (SLEEP)\n" );
} else if ( capVal = 0b001 ) {
SerialPrint ( "001 -> Standby mode (STDBY)\n" );
} else if ( capVal = 0b010 ) {
SerialPrint ( "010 -> Frequency Synthesizer mode (FS)\n" );
} else if ( capVal = 0b011 ) {
SerialPrint ( "011 -> Transmitter mode (TX)\n" );
} else if ( capVal = 0b100 ) {
SerialPrint ( "100 -> Receiver Mode (RX)\n" );
} else {
Serial.print( capVal, BIN );
SerialPrint ( " -> RESERVED\n" );
}
SerialPrint ( "\n" );
break;
}
case 0x2 : {
SerialPrint("Data Processing mode:\nDataMode : ");
capVal = (regVal >> 5) & 0x3;
if ( capVal == 0b00 ) {
SerialPrint ( "00 -> Packet mode\n" );
} else if ( capVal == 0b01 ) {
SerialPrint ( "01 -> reserved\n" );
} else if ( capVal == 0b10 ) {
SerialPrint ( "10 -> Continuous mode with bit synchronizer\n" );
} else if ( capVal == 0b11 ) {
SerialPrint ( "11 -> Continuous mode without bit synchronizer\n" );
}
SerialPrint("\nModulation scheme:\nModulation Type : ");
capVal = (regVal >> 3) & 0x3;
if ( capVal == 0b00 ) {
SerialPrint ( "00 -> FSK\n" );
modeFSK = 1;
} else if ( capVal == 0b01 ) {
SerialPrint ( "01 -> OOK\n" );
} else if ( capVal == 0b10 ) {
SerialPrint ( "10 -> reserved\n" );
} else if ( capVal == 0b11 ) {
SerialPrint ( "11 -> reserved\n" );
}
SerialPrint("\nData shaping: ");
if ( modeFSK ) {
SerialPrint( "in FSK:\n" );
} else {
SerialPrint( "in OOK:\n" );
}
SerialPrint ("ModulationShaping : ");
capVal = regVal & 0x3;
if ( modeFSK ) {
if ( capVal == 0b00 ) {
SerialPrint ( "00 -> no shaping\n" );
} else if ( capVal == 0b01 ) {
SerialPrint ( "01 -> Gaussian filter, BT = 1.0\n" );
} else if ( capVal == 0b10 ) {
SerialPrint ( "10 -> Gaussian filter, BT = 0.5\n" );
} else if ( capVal == 0b11 ) {
SerialPrint ( "11 -> Gaussian filter, BT = 0.3\n" );
}
} else {
if ( capVal == 0b00 ) {
SerialPrint ( "00 -> no shaping\n" );
} else if ( capVal == 0b01 ) {
SerialPrint ( "01 -> filtering with f(cutoff) = BR\n" );
} else if ( capVal == 0b10 ) {
SerialPrint ( "10 -> filtering with f(cutoff) = 2*BR\n" );
} else if ( capVal == 0b11 ) {
SerialPrint ( "ERROR - 11 is reserved\n" );
}
}
SerialPrint ( "\n" );
break;
}
case 0x3 : {
bitRate = (regVal << 8);
break;
}
case 0x4 : {
bitRate |= regVal;
SerialPrint ( "Bit Rate (Chip Rate when Manchester encoding is enabled)\nBitRate : ");
unsigned long val = 32UL * 1000UL * 1000UL / bitRate;
Serial.println( val );
SerialPrint( "\n" );
break;
}
case 0x5 : {
freqDev = ( (regVal & 0x3f) << 8 );
break;
}
case 0x6 : {
freqDev |= regVal;
SerialPrint( "Frequency deviation\nFdev : " );
unsigned long val = 61UL * freqDev;
Serial.println( val );
SerialPrint ( "\n" );
break;
}
case 0x7 : {
unsigned long tempVal = regVal;
freqCenter = ( tempVal << 16 );
break;
}
case 0x8 : {
unsigned long tempVal = regVal;
freqCenter = freqCenter | ( tempVal << 8 );
break;
}
case 0x9 : {
freqCenter = freqCenter | regVal;
SerialPrint ( "RF Carrier frequency\nFRF : " );
unsigned long val = 61UL * freqCenter;
Serial.println( val );
SerialPrint( "\n" );
break;
}
case 0xa : {
SerialPrint ( "RC calibration control & status\nRcCalDone : " );
if ( 0x40 & regVal ) {
SerialPrint ( "1 -> RC calibration is over\n" );
} else {
SerialPrint ( "0 -> RC calibration is in progress\n" );
}
SerialPrint ( "\n" );
break;
}
case 0xb : {
SerialPrint ( "Improved AFC routine for signals with modulation index lower than 2. Refer to section 3.4.16 for details\nAfcLowBetaOn : " );
if ( 0x20 & regVal ) {
SerialPrint ( "1 -> Improved AFC routine\n" );
} else {
SerialPrint ( "0 -> Standard AFC routine\n" );
}
SerialPrint ( "\n" );
break;
}
case 0xc : {
SerialPrint ( "Reserved\n\n" );
break;
}
case 0xd : {
byte val;
SerialPrint ( "Resolution of Listen mode Idle time (calibrated RC osc):\nListenResolIdle : " );
val = regVal >> 6;
if ( val == 0b00 ) {
SerialPrint ( "00 -> reserved\n" );
} else if ( val == 0b01 ) {
SerialPrint ( "01 -> 64 us\n" );
} else if ( val == 0b10 ) {
SerialPrint ( "10 -> 4.1 ms\n" );
} else if ( val == 0b11 ) {
SerialPrint ( "11 -> 262 ms\n" );
}
SerialPrint ( "\nResolution of Listen mode Rx time (calibrated RC osc):\nListenResolRx : " );
val = (regVal >> 4) & 0x3;
if ( val == 0b00 ) {
SerialPrint ( "00 -> reserved\n" );
} else if ( val == 0b01 ) {
SerialPrint ( "01 -> 64 us\n" );
} else if ( val == 0b10 ) {
SerialPrint ( "10 -> 4.1 ms\n" );
} else if ( val == 0b11 ) {
SerialPrint ( "11 -> 262 ms\n" );
}
SerialPrint ( "\nCriteria for packet acceptance in Listen mode:\nListenCriteria : " );
if ( 0x8 & regVal ) {
SerialPrint ( "1 -> signal strength is above RssiThreshold and SyncAddress matched\n" );
} else {
SerialPrint ( "0 -> signal strength is above RssiThreshold\n" );
}
SerialPrint ( "\nAction taken after acceptance of a packet in Listen mode:\nListenEnd : " );
val = (regVal >> 1 ) & 0x3;
if ( val == 0b00 ) {
SerialPrint ( "00 -> chip stays in Rx mode. Listen mode stops and must be disabled (see section 4.3)\n" );
} else if ( val == 0b01 ) {
SerialPrint ( "01 -> chip stays in Rx mode until PayloadReady or Timeout interrupt occurs. It then goes to the mode defined by Mode. Listen mode stops and must be disabled (see section 4.3)\n" );
} else if ( val == 0b10 ) {
SerialPrint ( "10 -> chip stays in Rx mode until PayloadReady or Timeout occurs. Listen mode then resumes in Idle state. FIFO content is lost at next Rx wakeup.\n" );
} else if ( val == 0b11 ) {
SerialPrint ( "11 -> Reserved\n" );
}
SerialPrint ( "\n" );
break;
}
default : {
}
}
#endif
}
unselect();
}
uint8_t RFM69::readTemperature(uint8_t calFactor) // returns centigrade
{
setMode(RFM69_MODE_STANDBY);
writeReg(REG_TEMP1, RF_TEMP1_MEAS_START);
while ((readReg(REG_TEMP1) & RF_TEMP1_MEAS_RUNNING)) {}
return ~readReg(REG_TEMP2) + COURSE_TEMP_COEF +
calFactor; // 'complement' corrects the slope, rising temp = rising val
} // COURSE_TEMP_COEF puts reading in the ballpark, user can add additional correction
void RFM69::rcCalibration()
{
writeReg(REG_OSC1, RF_OSC1_RCCAL_START);
while ((readReg(REG_OSC1) & RF_OSC1_RCCAL_DONE) == 0x00) {}
}

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lib/MySensors/hal/transport/RFM69/driver/old/RFM69_old.h Normal file
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// **********************************************************************************
// Driver definition for HopeRF RFM69W/RFM69HW/RFM69CW/RFM69HCW, Semtech SX1231/1231H
// **********************************************************************************
// Copyright Felix Rusu (2014), felix@lowpowerlab.com
// http://lowpowerlab.com/
// **********************************************************************************
// License
// **********************************************************************************
// This program is free software; you can redistribute it
// and/or modify it under the terms of the GNU General
// Public License as published by the Free Software
// Foundation; either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will
// be useful, but WITHOUT ANY WARRANTY; without even the
// implied warranty of MERCHANTABILITY or FITNESS FOR A
// PARTICULAR PURPOSE. See the GNU General Public
// License for more details.
//
// You should have received a copy of the GNU General
// Public License along with this program.
// If not, see <http://www.gnu.org/licenses/>.
//
// Licence can be viewed at
// http://www.gnu.org/licenses/gpl-3.0.txt
//
// Please maintain this license information along with authorship
// and copyright notices in any redistribution of this code
// **********************************************************************************
#ifndef RFM69_h
#define RFM69_h
#if !defined(RFM69_SPI)
#define RFM69_SPI hwSPI //!< default SPI
#endif
#define RFM69_MAX_DATA_LEN (61u) // to take advantage of the built in AES/CRC we want to limit the frame size to the internal FIFO size (66 bytes - 3 bytes overhead - 2 bytes crc)
#if defined(ARDUINO_ARCH_AVR)
#if defined(__AVR_ATmega32U4__)
#define DEFAULT_RFM69_IRQ_PIN (3) //!< DEFAULT_RFM69_IRQ_PIN
#else
#define DEFAULT_RFM69_IRQ_PIN (2) //!< DEFAULT_RFM69_IRQ_PIN
#endif
#define DEFAULT_RFM69_IRQ_NUM digitalPinToInterrupt(MY_RFM69_IRQ_PIN) //!< DEFAULT_RFM69_IRQ_NUM
#elif defined(ARDUINO_ARCH_ESP8266)
#define DEFAULT_RFM69_IRQ_PIN (5) //!< DEFAULT_RFM69_IRQ_PIN
#define DEFAULT_RFM69_IRQ_NUM digitalPinToInterrupt(MY_RFM69_IRQ_PIN) //!< DEFAULT_RFM69_IRQ_NUM
#elif defined(ARDUINO_ARCH_ESP32)
#define DEFAULT_RFM69_IRQ_PIN (16) //!< DEFAULT_RFM69_IRQ_PIN
#define DEFAULT_RFM69_IRQ_NUM digitalPinToInterrupt(DEFAULT_RFM69_IRQ_PIN) //!< DEFAULT_RFM69_IRQ_NUM
#elif defined(ARDUINO_ARCH_SAMD)
#define DEFAULT_RFM69_IRQ_PIN (2) //!< DEFAULT_RFM69_IRQ_PIN
#define DEFAULT_RFM69_IRQ_NUM digitalPinToInterrupt(MY_RFM69_IRQ_PIN) //!< DEFAULT_RFM69_IRQ_NUM
#elif defined(LINUX_ARCH_RASPBERRYPI)
#define DEFAULT_RFM69_IRQ_PIN (22) //!< DEFAULT_RFM69_IRQ_PIN
#define DEFAULT_RFM69_IRQ_NUM DEFAULT_RFM69_IRQ_PIN //!< DEFAULT_RFM69_IRQ_NUM
#elif defined(ARDUINO_ARCH_STM32F1)
#define DEFAULT_RFM69_IRQ_PIN (PA3) //!< DEFAULT_RFM69_IRQ_PIN
#define DEFAULT_RFM69_IRQ_NUM DEFAULT_RFM69_IRQ_PIN //!< DEFAULT_RFM69_IRQ_NUM
#elif defined(TEENSYDUINO)
#define DEFAULT_RFM69_IRQ_PIN (8) //!< DEFAULT_RFM69_IRQ_PIN
#define DEFAULT_RFM69_IRQ_NUM digitalPinToInterrupt(MY_RFM69_IRQ_PIN) //!< DEFAULT_RFM69_IRQ_NUM
#else
#define DEFAULT_RFM69_IRQ_PIN (2) //!< DEFAULT_RFM69_IRQ_PIN
#define DEFAULT_RFM69_IRQ_NUM (2) //!< DEFAULT_RFM69_IRQ_NUM
#endif
#define DEFAULT_RFM69_CS_PIN (SS) //!< DEFAULT_RFM69_CS_PIN
// SPI clock divier for non-transaction implementations
#if (MY_RFM69_SPI_SPEED >= F_CPU / 2)
#define RFM69_CLOCK_DIV SPI_CLOCK_DIV2 //!< SPI clock divider 2
#elif (MY_RFM69_SPI_SPEED >= F_CPU / 4)
#define RFM69_CLOCK_DIV SPI_CLOCK_DIV4 //!< SPI clock divider 4
#elif (MY_RFM69_SPI_SPEED >= F_CPU / 8)
#define RFM69_CLOCK_DIV SPI_CLOCK_DIV8 //!< SPI clock divider 8
#elif (MY_RFM69_SPI_SPEED >= F_CPU / 16)
#define RFM69_CLOCK_DIV SPI_CLOCK_DIV16 //!< SPI clock divider 16
#elif (MY_RFM69_SPI_SPEED >= F_CPU / 32)
#define RFM69_CLOCK_DIV SPI_CLOCK_DIV32 //!< SPI clock divider 32
#elif (MY_RFM69_SPI_SPEED >= F_CPU / 64)
#define RFM69_CLOCK_DIV SPI_CLOCK_DIV64 //!< SPI clock divider 64
#elif (MY_RFM69_SPI_SPEED >= F_CPU / 128)
#define RFM69_CLOCK_DIV SPI_CLOCK_DIV128 //!< SPI clock divider 128
#else
#define RFM69_CLOCK_DIV SPI_CLOCK_DIV256 //!< SPI clock divider 256
#endif
// powerup delay
#define RFM69_POWERUP_DELAY_MS (100u) //!< Power up delay, allow VCC to settle, transport to become fully operational
#define CSMA_LIMIT -90 // upper RX signal sensitivity threshold in dBm for carrier sense access
#define RFM69_MODE_SLEEP 0 // XTAL OFF
#define RFM69_MODE_STANDBY 1 // XTAL ON
#define RFM69_MODE_SYNTH 2 // PLL ON
#define RFM69_MODE_RX 3 // RX MODE
#define RFM69_MODE_TX 4 // TX MODE
// available frequency bands
#define RFM69_315MHZ 31 // non trivial values to avoid misconfiguration
#define RFM69_433MHZ 43
#define RFM69_868MHZ 86
#define RFM69_915MHZ 91
#define null 0
#define COURSE_TEMP_COEF -90 // puts the temperature reading in the ballpark, user can fine tune the returned value
#define RFM69_BROADCAST_ADDR 255
#define RFM69_CSMA_LIMIT_MS 1000
#define RFM69_TX_LIMIT_MS 1000
#define RFM69_FXOSC (32*1000000ul) //!< The crystal oscillator frequency of the module, 32MHz
#define RFM69_FSTEP (RFM69_FXOSC / 524288ul) //!< The Frequency Synthesizer step
// TWS: define CTLbyte bits
#define RFM69_CTL_SENDACK 0x80
#define RFM69_CTL_REQACK 0x40
/** RFM69 class */
class RFM69
{
public:
static volatile uint8_t DATA[RFM69_MAX_DATA_LEN]; //!< recv/xmit buf, including hdr & crc bytes
static volatile uint8_t DATALEN; //!< DATALEN
static volatile uint8_t SENDERID; //!< SENDERID
static volatile uint8_t TARGETID; //!< should match _address
static volatile uint8_t PAYLOADLEN; //!< PAYLOADLEN
static volatile uint8_t ACK_REQUESTED; //!< ACK_REQUESTED
static volatile uint8_t
ACK_RECEIVED; //!< Should be polled immediately after sending a packet with ACK requestwith ACK request
static volatile int16_t RSSI; //!< most accurate RSSI during reception (closest to the reception)
static volatile uint8_t _mode; //!< should be protected?
/**
* @brief Constructor
*
* @param slaveSelectPin ChipSelect pin.
* @param interruptPin Interrupt pin.
* @param isRFM69HW Set to @c true to indicate RFM69HW variant.
* @param interruptNum Interrupt number.
*/
// cppcheck-suppress uninitMemberVar
RFM69(uint8_t slaveSelectPin=MY_RFM69_CS_PIN, uint8_t interruptPin=MY_RFM69_IRQ_PIN,
bool isRFM69HW=false,
uint8_t interruptNum=digitalPinToInterrupt(MY_RFM69_IRQ_PIN))
{
_slaveSelectPin = slaveSelectPin;
_interruptPin = interruptPin;
_interruptNum = interruptNum;
_mode = RFM69_MODE_STANDBY;
_promiscuousMode = false;
_powerLevel = 31;
_isRFM69HW = isRFM69HW;
_address = RFM69_BROADCAST_ADDR;
#if !defined(SPI_HAS_TRANSACTION)
#if defined (SPCR) && defined (SPSR)
_SPCR = 0;
_SPSR = 0;
#endif
#if defined (SREG)
_SREG = 0;
#endif
#endif // SPI_HAS_TRANSACTION
}
bool initialize(uint8_t freqBand, uint8_t ID, uint8_t networkID=1); //!< initialize
void setAddress(uint8_t addr); //!< setAddress
void setNetwork(uint8_t networkID); //!< setNetwork
bool canSend(); //!< canSend
virtual void send(uint8_t toAddress, const void* buffer, uint8_t bufferSize,
bool requestACK=false); //!< send
virtual bool sendWithRetry(uint8_t toAddress, const void* buffer, uint8_t bufferSize,
uint8_t retries=5, uint8_t retryWaitTime=
200); //!< sendWithRetry (40ms roundtrip req for 61byte packets, adjusted)
virtual bool receiveDone(); //!< receiveDone
bool ACKReceived(uint8_t fromNodeID); //!< ACKReceived
bool ACKRequested(); //!< ACKRequested
virtual void sendACK(const void* buffer = "", uint8_t bufferSize=0); //!< sendACK
uint32_t getFrequency(); //!< getFrequency
void setFrequency(uint32_t freqHz); //!< setFrequency
void encrypt(const char* key); //!< encrypt
void setCS(uint8_t newSPISlaveSelect); //!< setCS
int16_t readRSSI(bool forceTrigger=false); //!< readRSSI
void promiscuous(bool onOff=true); //!< promiscuous
virtual void setHighPower(bool onOFF=
true); //!< setHighPower (have to call it after initialize for RFM69HW)
virtual void setPowerLevel(uint8_t level); //!< setPowerLevel (reduce/increase transmit power level)
void sleep(void); //!< sleep
void standBy(void); //!< standBy
void powerDown(void); //!< powerDown
void powerUp(void); //!< powerUp
void reset(void); //!< reset
bool sanityCheck(void); //!< sanityCheck
uint8_t readTemperature(uint8_t calFactor=0); //!< readTemperature (get CMOS temperature (8bit))
void rcCalibration(); //!< rcCalibration (calibrate the internal RC oscillator for use in wide temperature variations - see datasheet section [4.3.5. RC Timer Accuracy])
// allow hacking registers by making these public
uint8_t readReg(uint8_t addr); //!< readReg
void writeReg(uint8_t addr, uint8_t val); //!< writeReg
void readAllRegs(); //!< readAllRegs
protected:
static void isr0(); //!< isr0
void virtual interruptHandler(); //!< interruptHandler
virtual void interruptHook(uint8_t CTLbyte); //!< interruptHook
virtual void sendFrame(uint8_t toAddress, const void* buffer, uint8_t size, bool requestACK=false,
bool sendACK=false); //!< sendFrame
static RFM69* selfPointer; //!< selfPointer
uint8_t _slaveSelectPin; //!< _slaveSelectPin
uint8_t _interruptPin; //!< _interruptPin
uint8_t _interruptNum; //!< _interruptNum
uint8_t _address; //!< _address
bool _promiscuousMode; //!< _promiscuousMode
uint8_t _powerLevel; //!< _powerLevel
bool _isRFM69HW; //!< _isRFM69HW
#if defined (SPCR) && defined (SPSR)
uint8_t _SPCR; //!< _SPCR
uint8_t _SPSR; //!< _SPSR
#endif
#if defined (SREG)
uint8_t _SREG; //!< _SREG
#endif
virtual void receiveBegin(); //!< receiveBegin
virtual void setMode(uint8_t mode); //!< setMode
virtual void setHighPowerRegs(bool onOff); //!< setHighPowerRegs
virtual void select(); //!< select
virtual void unselect(); //!< unselect
};
#endif

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