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удаляем библиотеку

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This commit is contained in:
Dmitry Borisenko
2022-12-01 01:27:54 +01:00
parent 9436af94df
commit 2c61580157
295 changed files with 3 additions and 67232 deletions
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165
lib/MySensors/hal/architecture/NRF5/drivers/Flash.cpp
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@@ -1,165 +0,0 @@
/*
Flash.cpp - Flash library
Original Copyright (c) 2017 Frank Holtz. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "drivers/NVM/Flash.h"
#include <nrf.h>
FlashClass Flash;
uint32_t FlashClass::page_size() const
{
return (size_t)NRF_FICR->CODEPAGESIZE;
}
uint8_t FlashClass::page_size_bits() const
{
#if defined(NRF51)
return 10;
#elif defined(NRF52)
return 12;
#endif
}
uint32_t FlashClass::page_count() const
{
return (uint32_t)NRF_FICR->CODESIZE;
}
uint32_t FlashClass::specified_erase_cycles() const
{
return FLASH_ERASE_CYCLES;
}
uint32_t *FlashClass::page_address(size_t page)
{
return (uint32_t *)(page << page_size_bits());
}
uint32_t *FlashClass::top_app_page_address()
{
#if !defined(MCUBOOT_PRESENT)
// Bootcode at the top of the flash memory?
// https://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.sdk5.v12.0.0%2Flib_bootloader.html
if (NRF_UICR->NRFFW[0]<0xFFFFFFFF) {
// Return pointer calculated by SoftDevice/bootloader
return (uint32_t *)NRF_UICR->NRFFW[0];
}
#endif
// Return flash length
return (uint32_t *)(Flash.page_count() << Flash.page_size_bits());
}
void FlashClass::erase(uint32_t *address, size_t size)
{
size_t end_address = (size_t)address + size;
// align address
address =
(uint32_t *)((size_t)address & (size_t)((size_t)(~0) - FLASH_PAGE_SIZE));
// Wrong parameters?
if ((size_t)address >= end_address) {
return;
}
// get old nvm controller state
uint32_t old_config = NRF_NVMC->CONFIG;
// Enable erasing flash
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Een << NVMC_CONFIG_WEN_Pos;
// Erase page(s)
while ((size_t)address < end_address) {
wait_for_ready();
// Erase one 1k/4k page
NRF_NVMC->ERASEPAGE = (size_t)(address);
address = (uint32_t *)((size_t)address + FLASH_PAGE_SIZE);
}
// Disable erasing
wait_for_ready();
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
// Restore old state
wait_for_ready();
NRF_NVMC->CONFIG = old_config;
// Go back if controller is ready
wait_for_ready();
}
void FlashClass::erase_all()
{
// Enable erasing flash
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Een << NVMC_CONFIG_WEN_Pos;
wait_for_ready();
// Erase Flash and UICR
NRF_NVMC->ERASEALL = 1;
wait_for_ready();
// Disable erasing
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
wait_for_ready();
}
void FlashClass::write(uint32_t *address, uint32_t value)
{
// Compare word
if (*address != value) {
// Enable write
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
wait_for_ready();
// Write word
*address = value;
// Disable write
wait_for_ready();
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
wait_for_ready();
}
}
void FlashClass::write_block(uint32_t *dst_address, uint32_t *src_address,
uint16_t word_count)
{
// Enable write
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
wait_for_ready();
while (word_count > 0) {
// cppcheck-suppress duplicateConditionalAssign
if (*dst_address != *src_address) {
*dst_address = *src_address;
}
word_count--;
dst_address++;
src_address++;
}
// Disable write
wait_for_ready();
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
wait_for_ready();
}
void FlashClass::wait_for_ready()
{
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {
};
}

42
lib/MySensors/hal/architecture/NRF5/drivers/nrf5_wiring_constants.h
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@@ -1,42 +0,0 @@
/*
* nRF5 output modes
*/
// Standard 0, Standard 1
#ifndef OUTPUT_S0S1
#define OUTPUT_S0S1 (0x10)
#endif
// High Drive 0, Standard 1
#ifndef OUTPUT_H0S1
#define OUTPUT_H0S1 (0x11)
#endif
// Standard 0, High Drive 1
#ifndef OUTPUT_S0H1
#define OUTPUT_S0H1 (0x12)
#endif
// High Drive both
#ifndef OUTPUT_H0H1
#define OUTPUT_H0H1 (0x13)
#endif
// Disconnected 0, Standard 1
#ifndef OUTPUT_D0S1
#define OUTPUT_D0S1 (0x14)
#endif
// Disconnected 0, High Drive 1
#ifndef OUTPUT_D0H1
#define OUTPUT_D0H1 (0x15)
#endif
// Standard 0, Disconnected 1
#ifndef OUTPUT_S0D1
#define OUTPUT_S0D1 (0x16)
#endif
// High Drive 0, Disconnected 1
#ifndef OUTPUT_H0D1
#define OUTPUT_H0D1 (0x17)
#endif

102
lib/MySensors/hal/architecture/NRF5/drivers/nrf5_wiring_digital.c
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@@ -1,102 +0,0 @@
/*
Copyright (c) 2015 Arduino LLC. All right reserved.
Copyright (c) 2016 Sandeep Mistry All right reserved.
Copyright (c) 2017 Frank Holtz All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "nrf.h"
#include "Arduino.h"
#include "nrf5_wiring_constants.h"
#ifdef __cplusplus
extern "C" {
#endif
void nrf5_pinMode(uint32_t ulPin, uint32_t ulMode)
{
if (ulPin >= PINS_COUNT) {
return;
}
#ifdef ARDUINO_ARCH_NRF52
// Arduino: https://github.com/arduino-org/arduino-core-nrf52
ulPin = g_APinDescription[ulPin].ulPin;
#else
// Sandeep Mistry: https://github.com/sandeepmistry/arduino-nRF5
ulPin = g_ADigitalPinMap[ulPin];
#endif
// Set pin mode according to chapter '22.6.3 I/O Pin Configuration'
switch (ulMode) {
case INPUT:
// Set pin to input mode
NRF_GPIO->PIN_CNF[ulPin] =
((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos) |
((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
break;
case INPUT_PULLUP:
// Set pin to input mode with pull-up resistor enabled
NRF_GPIO->PIN_CNF[ulPin] =
((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos) |
((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
((uint32_t)GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) |
((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
break;
case INPUT_PULLDOWN:
// Set pin to input mode with pull-down resistor enabled
NRF_GPIO->PIN_CNF[ulPin] =
((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos) |
((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
((uint32_t)GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos) |
((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
break;
case OUTPUT:
// Set pin to output mode
NRF_GPIO->PIN_CNF[ulPin] =
((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos) |
((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
break;
default:
// calculate nRF specific output modes
if ((ulMode >= OUTPUT_S0S1) && (ulMode <= OUTPUT_H0D1)) {
// Set pin to given output mode
NRF_GPIO->PIN_CNF[ulPin] =
((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos) |
((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
((uint32_t)(ulMode - OUTPUT_S0S1) << GPIO_PIN_CNF_DRIVE_Pos) |
((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
}
break;
}
}
#ifdef __cplusplus
}
#endif

70
lib/MySensors/hal/architecture/NRF5/drivers/nrf_temp.h
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@@ -1,70 +0,0 @@
/*
* Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRF_TEMP_H__
#define NRF_TEMP_H__
#ifdef __cplusplus
extern "C" {
#endif
#define MASK_SIGN (0x00000200UL) //!< MASK_SIGN
#define MASK_SIGN_EXTENSION (0xFFFFFC00UL) //!< MASK_SIGN_EXTENSION
/**
* @brief Function for preparing the temp module for temperature measurement.
*
* This function initializes the TEMP module and writes to the hidden configuration register.
*/
static __INLINE void nrf_temp_init(void)
{
/**@note Workaround for PAN_028 rev2.0A anomaly 31 - TEMP: Temperature offset value has to be manually loaded to the TEMP module */
*(uint32_t *) 0x4000C504 = 0;
}
/**
* @brief Function for reading temperature measurement.
*
* The function reads the 10 bit 2's complement value and transforms it to a 32 bit 2's complement value.
*/
static __INLINE int32_t nrf_temp_read(void)
{
/**@note Workaround for PAN_028 rev2.0A anomaly 28 - TEMP: Negative measured values are not represented correctly */
return ((NRF_TEMP->TEMP & MASK_SIGN) != 0) ? (int32_t)(NRF_TEMP->TEMP | MASK_SIGN_EXTENSION) :
(NRF_TEMP->TEMP);
}
#ifdef __cplusplus
}
#endif
#endif

186
lib/MySensors/hal/architecture/NRF5/drivers/wdt.h
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@@ -1,186 +0,0 @@
/* Copyright (c) 2002, 2004 Marek Michalkiewicz
Copyright (c) 2005, 2006, 2007 Eric B. Weddington
Copyright (c) 2016 Frank Holtz
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
/* $Id$ */
/*
avr/wdt.h - macros for AVR watchdog timer
*/
#ifndef _NRF5_WDT_H_
#define _NRF5_WDT_H_
#include <nrf.h>
#include <stdint.h>
/** \file */
/** \defgroup avr_watchdog <avr/wdt.h>: Watchdog timer handling
\code #include <avr/wdt.h> \endcode
@ingroup internals
This header file declares the interface to some inline macros
handling the watchdog timer like present in many AVR devices.
In order to prevent the watchdog timer configuration from being
accidentally altered by a crashing application, a special timed
sequence is required in order to change it. The macros within
this header file handle the required sequence automatically
before changing any value. Interrupts will be disabled during
the manipulation.
*/
/**
\ingroup avr_watchdog
Reset the watchdog timer. When the watchdog timer is enabled,
a call to this instruction is required before the timer expires,
otherwise a watchdog-initiated device reset will occur.
*/
#define wdt_reset() NRF_WDT->RR[0] = WDT_RR_RR_Reload
/**
\ingroup avr_watchdog
Enable the watchdog timer, configuring it for expiry after
\c timeout (ms).
The WDT is running in sleep mode.
See also the symbolic constants \c WDTO_15MS et al.
*/
#define wdt_enable(timeout) \
NRF_WDT->CONFIG = NRF_WDT->CONFIG = (WDT_CONFIG_HALT_Pause << WDT_CONFIG_HALT_Pos) | ( WDT_CONFIG_SLEEP_Run << WDT_CONFIG_SLEEP_Pos); \
NRF_WDT->CRV = (32768*timeout)/1000; \
NRF_WDT->RREN |= WDT_RREN_RR0_Msk; \
NRF_WDT->TASKS_START = 1
/**
\ingroup avr_watchdog
Disable the watchdog timer. On nRF5 the timer cannot disabled.
The period is set to 36h of CPU run time. The WDT is stopped in sleep mode.
*/
#define wdt_disable() \
NRF_WDT->CONFIG = NRF_WDT->CONFIG = (WDT_CONFIG_HALT_Pause << WDT_CONFIG_HALT_Pos) | ( WDT_CONFIG_SLEEP_Pause << WDT_CONFIG_SLEEP_Pos); \
NRF_WDT->CRV = 4294967295
/**
\ingroup avr_watchdog
Symbolic constants for the watchdog timeout.
Possible timeout values are: 15 ms, 30 ms, 60 ms, 120 ms, 250 ms,
500 ms, 1 s, 2 s, 4s, 8s. (Not all devices allow 4 s or 8 s.)
Symbolic constants are formed by the prefix
\c WDTO_, followed by the time.
Example that would select a watchdog timer expiry of approximately
500 ms:
\code
wdt_enable(WDTO_500MS);
\endcode
*/
#define WDTO_15MS 15
/** \ingroup avr_watchdog
See \c WDTO_15MS */
#define WDTO_30MS 30
/** \ingroup avr_watchdog
See \c WDTO_15MS */
#define WDTO_60MS 60
/** \ingroup avr_watchdog
See \c WDTO_15MS */
#define WDTO_120MS 120
/** \ingroup avr_watchdog
See \c WDTO_15MS */
#define WDTO_250MS 250
/** \ingroup avr_watchdog
See \c WDTO_15MS */
#define WDTO_500MS 500
/** \ingroup avr_watchdog
See \c WDTO_15MS */
#define WDTO_1S 1000
/** \ingroup avr_watchdog
See \c WDTO_15MS */
#define WDTO_2S 2000
/** \ingroup avr_watchdog
See \c WDTO_15MS
Note: This is only available on the
ATtiny2313,
ATtiny24, ATtiny44, ATtiny84, ATtiny84A,
ATtiny25, ATtiny45, ATtiny85,
ATtiny261, ATtiny461, ATtiny861,
ATmega48, ATmega88, ATmega168,
ATmega48P, ATmega88P, ATmega168P, ATmega328P,
ATmega164P, ATmega324P, ATmega644P, ATmega644,
ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561,
ATmega8HVA, ATmega16HVA, ATmega32HVB,
ATmega406, ATmega1284P,
AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316,
AT90PWM81, AT90PWM161,
AT90USB82, AT90USB162,
AT90USB646, AT90USB647, AT90USB1286, AT90USB1287,
ATtiny48, ATtiny88,
nRF51822, nRF52832
*/
#define WDTO_4S 4000
/** \ingroup avr_watchdog
See \c WDTO_15MS
Note: This is only available on the
ATtiny2313,
ATtiny24, ATtiny44, ATtiny84, ATtiny84A,
ATtiny25, ATtiny45, ATtiny85,
ATtiny261, ATtiny461, ATtiny861,
ATmega48, ATmega48A, ATmega48PA, ATmega88, ATmega168,
ATmega48P, ATmega88P, ATmega168P, ATmega328P,
ATmega164P, ATmega324P, ATmega644P, ATmega644,
ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561,
ATmega8HVA, ATmega16HVA, ATmega32HVB,
ATmega406, ATmega1284P,
ATmega2564RFR2, ATmega256RFR2, ATmega1284RFR2, ATmega128RFR2, ATmega644RFR2, ATmega64RFR2
AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316,
AT90PWM81, AT90PWM161,
AT90USB82, AT90USB162,
AT90USB646, AT90USB647, AT90USB1286, AT90USB1287,
ATtiny48, ATtiny88,
ATxmega16a4u, ATxmega32a4u,
ATxmega16c4, ATxmega32c4,
ATxmega128c3, ATxmega192c3, ATxmega256c3,
nRF51822, nRF52832
*/
#define WDTO_8S 8000
#endif /* _NRF5_WDT_H_ */